Field of the Invention
The present invention relates to a printed circuit board (PCB) and in particular to a printed circuit board comprising conductive layers separated by insulation layers of dielectric material, at least one conductive layer being patterned and having at least one signal line embedded in an insulation material, whereby a conductive layer, separated by the insulation material and lying in a predetermined distance from the at least one signal line includes a ground plane area associated to and extending along the at least one signal line.
Description of the Related Art
Increasing miniaturization and extreme electronic component density as well as the necessity to transfer large amounts of data at high speed, e.g. at rates of 1 to 5 Gbps, can create serious problems with respect to signal integrity in PCBs. A specific problem with signal integrity in a PCB is the desire to configure signal lines with predetermined high impedance. In order to avoid signal losses due to reflections at interfaces with other signal lines, it is necessary to adjust the line impedance during the manufacture of a PCB as accurately as possible. Leakage currents, which should be as small as possible, constitute a further problem. A still further problem, typically for high speed lines, is associated with return currents in HF-applications. Diverging return current paths lead to an uncontrolled impedance of the transmission line between a signal line and a ground plane. Accordingly, it is generally recommended to avoid any splitting of the ground plane. Finally, the current paths may be considered an antenna that receives and transmits signal energy creating electromagnetic interference.
FIG. 1 is a cross sectional view of a PCB having three conducting layers, separated by two dielectric insulation layers. In this example of a conventional PCB 1 the bottom layer 2 is a structured layer of conductive material, mostly copper, having two signal lines 3, 4. Separated by a dielectric layer 5 there is arranged a further conductive layer 6, acting as a ground plane. This layer may be a structured layer of conductive material too, however in “electrically” proximity of the signal lines this layer 6 is made continuous. The conductive layer is followed by another dielectric insulation layer 7 and here the uppermost layer is a further conductive layer 8, which may be a structured layer of conductive material in a well-known manner. Electrical field lines are indicated schematically by broken lines.
The impedance of the signal transmission line is a function, amongst others, of the distance between the signal lines 3, 4; ground defined primarily by the conductive layer 6; the width of the lines 3, 4; and the relative permittivity ∈r of dielectric layer 5. At a given width of a signal line, a higher impedance may be reached by using a dielectric layer with a low relative permittivity ∈r and/or by increasing the distance between the signal line and the conductive layer 6. Since the relative permittivity is determined in most cases by the commercially available materials, such as, but not limited to prepregs, FR4, Polyimide etc., the impedance may be increased by increasing the distance between the signal lines 3, 4 and the conductive layer 6. The increase in distance leads to an undesirable increase of the thickness of the PCB as such. The current standard impedance requirement of 90-100 ohms is almost impossible to achieve for a strip line with a single dielectric layer multilayer microvia stack of a HDI (High Density Interconnect) PCB. This is a challenge for the designers, who in some cases need to introduce an additional layer just to reach the required impedance in some specific tight areas of the stack. In addition, in order to reduce loss of electrical signal in high-frequency applications, the PCB must show low dielectric constant and low dielectric loss.